Lauterbach's Trace32 tools support Synopsys' ASIP Designer

Synopsys’ latest ASIP designer tool will soon be supported by Lauterbach’s Trace32 debug and trace tools. The trace analyses will also help bring embedded systems to market faster and more securely.

Lauterbach’s “TRACE32” development tools now offer interoperability with the latest Synopsys “ASIP Designer” tool for designing application-specific instruction set processors (ASIPs) and programmable accelerators. Trace32 support includes debugging of ASIP cores on a hardware implementation or in the Synopsys instruction set simulator.

Lauterbach extends support for its Trace32 debug and trace tools to application-specific instruction set processors created with version V-2024.06 of Synopsys’ ASIP designer tool.

Synopsys’ ASIP Designer tool accelerates the design of application-specific instruction set processors (ASIPs) and programmable accelerators. The ASIP Designer’s language-based approach automatically generates synthesizable RTL and software development kits (SDKs) from a single architectural specification, significantly reducing processor design and verification efforts. ASIPs are used in a wide range of signal processing-intensive applications, including wireless base stations, mobile phones, audio processing, image processing, and cloud computing.

For fast and secure embedded designs

The Synopsys and Lauterbach development teams worked closely together to implement Trace32 support. The result is an API that allows the “TRACE32 PowerView” software to access the ASIP designer’s instruction set simulators and disassemblers, as well as the actual hardware implementation of the ASIP generated by the ASIP designer on an FPGA or ASIC. Trace32 and the API support the ASIP designer’s wide range of architectures, from specialty scalar processors to VLIW (Very Long Instruction Word) and wide vector processors.

The Trace32 tools consist of the universal debug and trace software PowerView and debug and trace accelerator modules. While Lauterbach’s intelligent “PowerDebug” modules offer fast download speeds and short response times for efficient debugging and test automation, the “PowerTrace” real-time trace modules provide complete insight into the activities of the CPUs and other cores of an embedded system without affecting its real-time performance. Trace analyses, including code coverage measurements, can help bring embedded designs to market faster, more safely and more reliably.

Trace32 enables simultaneous debugging and tracing of the CPU and other cores in a SoC, a unique capability that spans the entire system. It does not matter if it is SMP (symmetric multiprocessing), AMP (asymmetric multiprocessing) or iAMP (integrated asymmetric multiprocessing). Lauterbach’s iAMP debug and trace technology enables debugging of multicore systems with identical CPU instruction sets in a single Trace32 PowerView GUI.

“In conjunction with the latest version of Synopsys’ ASIP Designer, our Trace32 tools can now also be used to debug custom processors, ASIP instruction set architectures and peripherals for virtually any application implementation,” said Stephan Lauterbach, founder and CTO of Lauterbach. “This applies to the entire lifecycle from simulator to real silicon.”

“Synopsys ASIP Designer gives users the ability to accelerate the development of custom processors with the best power, performance and area for their specific applications,” said Mick Posner, Vice President of IP Product Management at Synopsys. “The collaboration between Synopsys and Lauterbach enables software developers to accelerate their innovation and optimize embedded software to create highly differentiated products.”